 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| SN74LS259 8-Bit Addressable Latch The SN74LS259 is a high-speed 8-Bit Addressable Latch designed for general purpose storage applications in digital systems. It is a multifunctional device capable of storing single line data in eight addressable latches, and also a 1-of-8 decoder and demultiplexer with active HIGH outputs. The device also incorporates an active LOW common Clear for resetting all latches, as well as, an active LOW Enable. http://onsemi.com * * * * * * Serial-to-Parallel Conversion Eight Bits of Storage With Output of Each Bit Available Random (Addressable) Data Entry Active High Demultiplexing or Decoding Capability Easily Expandable Common Clear LOW POWER SCHOTTKY GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Parameter Supply Voltage Operating Ambient Temperature Range Output Current - High Output Current - Low Min 4.75 0 Typ 5.0 25 Max 5.25 70 - 0.4 8.0 Unit V C mA mA 16 1 PLASTIC N SUFFIX CASE 648 16 1 SOIC D SUFFIX CASE 751B ORDERING INFORMATION Device SN74LS259N SN74LS259D Package 16 Pin DIP 16 Pin Shipping 2000 Units/Box 2500/Tape & Reel (c) Semiconductor Components Industries, LLC, 1999 1 December, 1999 - Rev. 6 Publication Order Number: SN74LS259/D SN74LS259 CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 C 15 E 14 D 13 Q7 12 Q6 11 Q5 10 Q4 9 1 Ao 2 A1 3 A2 4 Q0 5 Q1 6 Q2 7 Q3 8 GND LOADING (Note a) PIN NAMES A0, A1, A2 D E C Q0 - Q7 Address Inputs Data Input Enable (Active LOW) Input Clear (Active LOW) Input Parallel Latch Outputs HIGH 0.5 U.L. 0.5 U.L. 1.0 U.L. 0.5 U.L. 10 U.L. LOW 0.25 U.L. 0.25 U.L. 0.5 U.L. 0.25 U.L. 5 U.L. NOTES: a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW. http://onsemi.com 2 SN74LS259 LOGIC DIAGRAM E 14 D 13 1 A0 2 A1 A2 3 15 C VCC = PIN 16 GND = PIN 8 = PIN NUMBERS 4 5 6 7 9 10 11 12 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 FUNCTIONAL DESCRIPTION The SN74LS259 has four modes of operation as shown in the mode selection table. In the addressable latch mode, data on the Data line (D) is written into the addressed latch.The addressed latch will follow the data input with all non-addressed latches remaining in their previous states. In the memory mode, all latches remain in their previous state and are unaffected by the Data or Address inputs. In the one-of-eight decoding or demultiplexing mode, the addressed output will follow the state of the D input with all MODE SELECTION E L H L H C H H L L MODE Addressable Latch Memory Active HIGH Eight-Channel Demultiplexer Clear C E D A0 L L L L L * * * * * L H L L L L * * * * * L X L H L H * * * * * H X L L H H A1 X L L L L * * * * * H X L L L L * * * * * H H A2 X L L L L Q0 L L H L L other inputs in the LOW state. In the clear mode all outputs are LOW and unaffected by the address and data inputs. When operating the SN74LS259 as an addressable latch, changing more then one bit of the address could impose a transient wrong address. Therefore, this should only be done while in the memory mode. The truth table below summarizes the operations. TRUTH TABLE PRESENT OUTPUT STATES Q1 L L L L H Q2 L L L L L Q3 L L L L L * * * * * L Q4 L L L L L Q5 L L L L L Q6 L L L L L Q7 L L L L L MODE Clear Demultiplex H X L L H H H X L L L L L QN-1 L H QN-1 QN-1 L L L L L H Memory HHX H H H H * * * * * H H I L L L * * * * * L L I H L H * * * * * L H QN-1 QN-1 L H QN-1 QN-1 QN-1 QN-1 QN-1 Addressable Latch X = Don't Care Condition L = LOW Voltage Level H = HIGH Voltage Level QN-1 = Previous Output State * * * * * QN-1 QN-1 L H H H H H QN-1 QN-1 http://onsemi.com 3 SN74LS259 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol VIH VIL VIK VOH Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 2.7 - 0.65 3.5 0.25 VO OL Output LOW Voltage 0.35 IIH IIL IOS ICC Input HIGH Current 0.1 Input LOW Current Short Circuit Current (Note 1) Power Supply Current -20 - 0.4 - 100 36 0.5 20 V A mA mA mA mA IOL = 8.0 mA 0.4 Min 2.0 0.8 - 1.5 Typ Max Unit V V V V V Test Conditions Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input LOW Voltage for All Inputs VCC = MIN, IIN = - 18 mA VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table IOL = 4.0 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table VCC = MAX, VIN = 2.7 V VCC = MAX, VIN = 7.0 V VCC = MAX, VIN = 0.4 V VCC = MAX VCC = MAX Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25C, VCC = 5.0 V) Limits Symbol tPLH tPHL tPLH tPHL tPLH tPHL tPHL Parameter Turn-Off Delay, Enable to Output Turn-On Delay, Enable to Output Turn-Off Delay, Data to Output Turn-On Delay, Data to Output Turn-Off Delay, Address to Output Turn-On Delay, Address to Output Turn-On Delay, Clear to Output Min Typ 22 15 20 13 24 18 17 Max 35 24 32 21 38 29 27 Unit ns ns ns ns ns ns ns Test Conditions CL = 15 pF AC SET-UP REQUIREMENTS (TA = 25C, VCC = 5.0 V) Limits Symbol ts tW th th Input Setup Time Pulse Width, Clear or Enable Hold Time, Data Hold Time, Address Parameter Min 20 15 5.0 20 Typ Max Unit ns ns ns ns http://onsemi.com 4 SN74LS259 AC WAVEFORMS D D tw E tPHL Q OTHER CONDITIONS: C = H, A = STABLE tPLH 1.3 V OTHER CONDITIONS: E = L, C = H, A = STABLE tw 1.3 V Q 1.3 V tPHL 1.3 V 1.3 V tPLH 1.3 V Figure 2. Turn-on and Turn-off Delays, Data to Output Figure 1. Turn-on and Turn-off Delays, Enable To Output and Enable Pulse Width A1 1.3 V 1.3 V D ts(H) th(H) ts(L) th(L) 1.3 V A1 Q1 1.3 V tPHL 1.3 V 1.3 V tPLH 1.3 V E Q Q=D Q=D OTHER CONDITIONS: E = L, C = L, D = H OTHER CONDITIONS: C = H, A = STABLE Figure 3. Turn-on and Turn-off Delays, Address to Output Figure 4. Setup and Hold Time, Data to Enable C 1.3 V tPHL A ts E STABLE ADDRESS Q OTHER CONDITIONS: E = H 1.3 V Figure 5. Turn-on Delay, Clear to Output OTHER CONDITIONS: C = H Figure 6. Setup Time, Address to Enable (See Notes 1 and 2) NOTES: 1. The Address to Enable Setup Time is the time before the HIGH-to-LOW Enable transition that the Address must be stable so that the correct latch is addressed and the other latches are not affected. 2. The shaded areas indicate when the inputs are permitted to change for predictable output performance. http://onsemi.com 5 SN74LS259 PACKAGE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 648-08 ISSUE R -A- 16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 B 1 8 F S C L -T- H G D 16 PL SEATING PLANE K J TA M M 0.25 (0.010) M http://onsemi.com 6 SN74LS259 PACKAGE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE J -A- NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 16 9 -B- 1 8 P 8 PL 0.25 (0.010) M B S G F K C -T- SEATING PLANE R X 45 _ M D 16 PL M J 0.25 (0.010) TB S A S DIM A B C D F G J K M P R http://onsemi.com 7 SN74LS259 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION North America Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (M-F 2:30pm to 5:00pm Munich Time) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (M-F 2:30pm to 5:00pm Toulouse Time) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (M-F 1:30pm to 5:00pm UK Time) Email: ONlit@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong 800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-8549 Phone: 81-3-5487-8345 Email: r14153@onsemi.com Fax Response Line: 303-675-2167 800-344-3810 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 SN74LS259/D |
Price & Availability of SN74LS259N
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |